Banca de DEFESA: VITOR HUGO MICKUS RODRIGUES

Uma banca de DEFESA de MESTRADO foi cadastrada pelo programa.
STUDENT : VITOR HUGO MICKUS RODRIGUES
DATE: 16/01/2020
TIME: 10:00
LOCAL: Auditório nPITI
TITLE:

GPU Support for Automatic Generation of Finite-Differences Stencil Kernels

KEY WORDS:

GPU, Domain Specific Languages, finite-differences, stencil kernels,parallel architectures, Devito, OPS

PAGES: 35
BIG AREA: Ciências Exatas e da Terra
AREA: Ciência da Computação
SUMMARY:

The growth of data to be processed in the Oil & Gas industry matches the requirements imposed by evolving algorithms based on stencil computations, such as Full Waveform Inversion and Reverse Time Migration. Graphical processing units (GPUs) are an attractive architectural target for stencil computations because of its high degree of data parallelism. However, the rapid architectural and technological progression makes it difficult for even the most proficient programmers to remain up-to-date with the technological advances at a micro-architectural level. In this work, we present an extension for an open source compiler designed to produce highly optimized finite difference kernels for use in inversion methods named Devito c . We embed it with the Oxford Parallel Domain Specific Language (OP-DSL) in order to enable automatic code generation for GPU architectures from a high-level representation. We aim to enable users coding in a symbolic representation level to effortlessly get their implementations leveraged by the processing capacities of GPU architectures. The implemented backend is evaluated on a NVIDIA R GTX Titan Z, and on a NVIDIA R Tesla V100. in terms of operational intensity through the roofline model. Experimented with a 3D acoustic isotropic wave propagation stencil kernels for varying space-order discretization levels. It achieves approximately 63% of V100’s peak performance and 24% of Titan Z’s peak performance for stencil kernels over grids with 256 3 points. This study reveals that improving memory usage should be the most efficient strategy for leveraging the performance of the implemented solution on the evaluated architectures.

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