Banca de QUALIFICAÇÃO: LUCILEIDE MEDEIROS DANTAS DA SILVA

Uma banca de QUALIFICAÇÃO de DOUTORADO foi cadastrada pelo programa.
STUDENT : LUCILEIDE MEDEIROS DANTAS DA SILVA
DATE: 04/12/2019
TIME: 13:30
LOCAL: Auditório do nPITI
TITLE:

Reconfigurable Computing applied to Streaming Data and Machine Learning

KEY WORDS:

Q-learning; LSTM; TEDA; Streaming; Machine Learning; Reconfigurable Computing; FPGA;

PAGES: 45
BIG AREA: Engenharias
AREA: Engenharia Elétrica
SUBÁREA: Circuitos Elétricos, Magnéticos e Eletrônicos
SPECIALTY: Circuitos Eletrônicos
SUMMARY:

This work proposes the development of streaming and machine learning algorithms applications with reconfigurable hardware. The aim is to investigate different techniques within this scope, analysing processing speed and also energy consumption. Developing streaming and machine learning algorithms in hardware enables systems to be faster than their software equivalents, thus opening up possibilities of its use in problems where meeting tight time constraints and/or processing a large data volume is required. It is even possible to reduce the clock cycle in applications where processing speed is not limiting, or less relevant, to decrease energy consumption. For this work, Field-Programmable Gate Arrays (FPGA) was chosen because it provides high performance and density ASIC-like with the advantages of reduced development time, ease and speed of reprogramming, flexibility, parallelism not to mention low power consumption. The main contribution of this thesis proposal is to observe the impact of how reinforcement learning algorithms: Q-learning; Recurrent Neural Networks: Long-Short-Term Memory (LSTM); and data streaming: Typicality and Eccentricity Data Analytics (TEDA); implemented in reconfigurable hardware can improve the technical performance and in what kinds of applications and problems they can be used. Studies are being carried out regarding the complexities of the computational technique to find out how much it can minimize the latency after its implementation with reconfigurable computation. It is intended to present reference architectures, which will allow the efficient use of the algorithms following criteria of low latency, low power consumption and high speed of response.

BANKING MEMBERS:
Presidente - 1837240 - MARCELO AUGUSTO COSTA FERNANDES
Interno - 1153006 - LUIZ AFFONSO HENDERSON GUEDES DE OLIVEIRA
Externo à Instituição - JOÃO PAULO DE CASTRO CANAS FERREIRA - FEUP