Banca de DEFESA: NAYANA LETÍCIA DE MORAIS VIANA

Uma banca de DEFESA de MESTRADO foi cadastrada pelo programa.
DISCENTE : NAYANA LETÍCIA DE MORAIS VIANA
DATA : 29/07/2019
HORA: 15:00
LOCAL: nPITI IMD
TÍTULO:

Design of a low consumption, low noise and low offset instrumentation amplifier for portable applications

PALAVRAS-CHAVES:

Instrumentation Amplifier, Integrated Circuits, Biopotentials, CMOS Technology.

PÁGINAS: 65
GRANDE ÁREA: Engenharias
ÁREA: Engenharia Elétrica
SUBÁREA: Circuitos Elétricos, Magnéticos e Eletrônicos
ESPECIALIDADE: Circuitos Eletrônicos
RESUMO:

In this work is presented a low power instrumentation amplifier using 0.6 μm CMOS technology. It is initially shown the theoretical background about the chosen application: treatment of biopotentials. Next, we present the architectures of instrumentation amplifiers present in the literature focused on biopotentials, as well as low power and low noise configurations. A study is also carried out on the types of pseudo-resistors present in the literature. Once this is done, all the methodology used to perform this work is presented, such as the choice of the architecture used, how the system design is performed and what types of simulations are used to evaluate the performance of the system. Finally, it can be concluded that using integrated circuits with CMOS technology can enable numerous low-power portable applications that use the acquisition of biopotentials, thus justifying such design.

MEMBROS DA BANCA:
Presidente - 2140683 - DIOMADSON RODRIGUES BELFORT
Interno - 1284113 - SEBASTIAN YURI CAVALCANTI CATUNDA
Externo ao Programa - 1157135 - ANTONIO WALLACE ANTUNES SOARES
Externo à Instituição - FRANCISCO DE ASSIS BRITO FILHO - UFERSA